Parameter sensitivity for optimal design of 65 nm node SOI transistors

Research output: Contribution to journalArticlepeer-review

33 Citations (Scopus)


Mixed-mode simulation, where device simulation is embedded directly within a circuit simulator, is used for the first time to provide scaling guidelines to achieve optimal digital circuit performance for double gate SOI MOSFETs. This significant advance overcomes the lack of availability of SPICE model parameters. The sensitivity of the gate delay and on-off current ratio to each of the key geometric and technological parameters of the transistor is quantified. The impact of the source-drain doping profile on circuit performance is comprehensively investigated.
Original languageEnglish
Pages (from-to)1034-1043
Number of pages10
JournalSolid State Electronics
Issue number6
Publication statusPublished - Jun 2005

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics


Dive into the research topics of 'Parameter sensitivity for optimal design of 65 nm node SOI transistors'. Together they form a unique fingerprint.

Cite this