The emergence of programmable logic devices as processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimization of algorithms on these platforms. This paper describes Abhainn, a rapid implementation methodology and toolsuite for translating an algorithmic expression of the system to a working implementation on a heterogeneous multiprocessor/field programmable gate array platform, or a standalone system on programmable chip solution. Two particular focuses for Abhainn are the automated but configurable realisation of inter-processor communuication fabrics, and the establishment of novel dedicated hardware component design methodologies allowing algorithm level transformation for system optimization. This paper outlines the approaches employed in both these particular instances.
|Title of host publication||Embedded Computer Systems: Architectures, Modelling and Simulation|
|Editors||Timo Hamalainen, Andy Pimentel, Jarmo Takala, Stamatis Vassiliadis|
|Number of pages||10|
|Publication status||Published - Jul 2005|
|Name||Lecture Notes In Computer Science|