Abstract
An overview of research on reconfigurable architectures for network processing applications within the Institute of Electronics, Communications and Information Technology (ECIT) is presented. Three key network processing topics, namely node throughput, Quality of Service (QoS) and security are examined where custom reconfigurability allows network nodes to adapt to fluctuating network traffic and customer demands. Various architectural possibilities have been investigated in order to explore the options and tradeoffs available when using reconfigurability for packet/frame processing, packet-scheduling and data encryption/decryption. This research has shown there is no common approach that can be applied. Rather the methodologies used and the cost-benefits for incorporation of reconfigurability depend on each of the functions considered, for example being well suited to encryption/decryption but not packet/frame processing. © 2005 IEEE.
Original language | English |
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Title of host publication | 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) |
Pages | 75-83 |
Number of pages | 9 |
Volume | 2005 |
DOIs | |
Publication status | Published - Apr 2005 |
Event | IEEE International Symposium on VLSI Technology Systems and Applications (VLSI-TSA) - Taiwan, Taiwan, Province of China Duration: 01 Apr 2005 → 01 Apr 2005 |
Conference
Conference | IEEE International Symposium on VLSI Technology Systems and Applications (VLSI-TSA) |
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Country/Territory | Taiwan, Province of China |
City | Taiwan |
Period | 01/04/2005 → 01/04/2005 |
Bibliographical note
ISSN: 0780390601ASJC Scopus subject areas
- General Engineering