Reconfigurable cryptographic RISC microprocessor

Neil Smyth; Maire McLoone; John V. McCanny

doi:10.1109/VDAT.2005.1500012

Reconfigurable cryptographic RISC microprocessor

Neil Smyth, Maire McLoone, John V. McCanny

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper describes a novel RISC microprocessor that can be utilised to rapidly develop a reprogrammable and high performance embedded security-processing system in SoC designs. Generic and innovative algorithm-specific instructions have been developed for a wide range of private-key and hash algorithms. To the authors' knowledge, this is the first generic cryptographic microprocessor to be reported in the literature.

Original language	English
Title of host publication	2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT): Proceedings
Pages	29-32
Number of pages	4
Volume	2005
DOIs	https://doi.org/10.1109/VDAT.2005.1500012
Publication status	Published - Apr 2005
Event	International Symposium on VLSI Design, Automation and Test - Hsinchu, Taiwan, Province of China Duration: 27 Apr 2005 → 29 Apr 2005

Conference

Conference	International Symposium on VLSI Design, Automation and Test
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	27/04/2005 → 29/04/2005

ASJC Scopus subject areas

General Engineering

Access to Document

10.1109/VDAT.2005.1500012

Cite this

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title = "Reconfigurable cryptographic RISC microprocessor",

abstract = "This paper describes a novel RISC microprocessor that can be utilised to rapidly develop a reprogrammable and high performance embedded security-processing system in SoC designs. Generic and innovative algorithm-specific instructions have been developed for a wide range of private-key and hash algorithms. To the authors' knowledge, this is the first generic cryptographic microprocessor to be reported in the literature.",

author = "Neil Smyth and Maire McLoone and McCanny, {John V.}",

year = "2005",

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doi = "10.1109/VDAT.2005.1500012",

language = "English",

isbn = "0-7803-9060-1",

volume = "2005",

pages = "29--32",

booktitle = "2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT): Proceedings",

note = "International Symposium on VLSI Design, Automation and Test ; Conference date: 27-04-2005 Through 29-04-2005",

}

Smyth, N, McLoone, M & McCanny, JV 2005, Reconfigurable cryptographic RISC microprocessor. in 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT): Proceedings. vol. 2005, pp. 29-32, International Symposium on VLSI Design, Automation and Test, Hsinchu, Taiwan, Province of China, 27/04/2005. https://doi.org/10.1109/VDAT.2005.1500012

TY - GEN

T1 - Reconfigurable cryptographic RISC microprocessor

AU - Smyth, Neil

AU - McLoone, Maire

AU - McCanny, John V.

PY - 2005/4

Y1 - 2005/4

N2 - This paper describes a novel RISC microprocessor that can be utilised to rapidly develop a reprogrammable and high performance embedded security-processing system in SoC designs. Generic and innovative algorithm-specific instructions have been developed for a wide range of private-key and hash algorithms. To the authors' knowledge, this is the first generic cryptographic microprocessor to be reported in the literature.

AB - This paper describes a novel RISC microprocessor that can be utilised to rapidly develop a reprogrammable and high performance embedded security-processing system in SoC designs. Generic and innovative algorithm-specific instructions have been developed for a wide range of private-key and hash algorithms. To the authors' knowledge, this is the first generic cryptographic microprocessor to be reported in the literature.

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U2 - 10.1109/VDAT.2005.1500012

DO - 10.1109/VDAT.2005.1500012

M3 - Conference contribution

SN - 0-7803-9060-1

VL - 2005

SP - 29

EP - 32

BT - 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT): Proceedings

T2 - International Symposium on VLSI Design, Automation and Test

Y2 - 27 April 2005 through 29 April 2005

ER -

Reconfigurable cryptographic RISC microprocessor

Abstract

Conference

ASJC Scopus subject areas

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