Projects per year
Power capping is a fundamental method for reducing the energy consumption of a wide range of modern computing environments, ranging from mobile embedded systems to datacentres. Unfortunately, maximising performance and system efficiency under static power caps remains challenging, while maximising performance under dynamic power caps has been largely unexplored. We present an adaptive power capping method that reduces the power consumption and maximizes the performance of heterogeneous SoCs for mobile and server platforms. Our technique combines power capping with coordinated DVFS, data partitioning and core allocations on a heterogeneous SoC with ARM processors and FPGA resources. We design our framework as a run-time system based on OpenMP and OpenCL to utilise the heterogeneous resources. We evaluate it through five data-parallel benchmarks on the Xilinx SoC which allows fully voltage and frequency control. Our experiments show a significant performance boost of 30% under dynamic power caps with concurrent execution on ARM and FPGA, compared to a naive separate approach.
|Title of host publication||Proceedings of International Conference on Embedded Computer Systems: Architecture, Modeling and Simulation (SAMOS XVI)|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||8|
|Publication status||Published - 19 Jan 2017|
|Event||16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation - Pythagorion, Samos, Greece|
Duration: 17 Jul 2016 → 21 Jul 2016
http://samos-conference.com/ (Link to conference details online)
|Conference||16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation|
|Abbreviated title||SAMOS XVI|
|Period||17/07/2016 → 21/07/2016|
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- 3 Finished
01/08/2012 → 28/04/2017