Scaling issues for analogue circuits using Double Gate SOI transistors

Research output: Contribution to journalArticlepeer-review

16 Citations (Scopus)

Abstract

This work presents a systematic analysis on the impact of source-drain engineering using gate
Original languageEnglish
Pages (from-to)320-327
Number of pages8
JournalSOLID-STATE ELECTRONICS
Volume51
Issue number2
DOIs
Publication statusPublished - Feb 2007

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

Fingerprint

Dive into the research topics of 'Scaling issues for analogue circuits using Double Gate SOI transistors'. Together they form a unique fingerprint.

Cite this