Scaling issues for analogue circuits using Double Gate SOI transistors

T.C. Lim; Alastair Armstrong

doi:10.1016/j.sse.2007.01.006

Scaling issues for analogue circuits using Double Gate SOI transistors

T.C. Lim
, Alastair Armstrong

School of Electronics, Electrical Engineering and Computer Science

Research output: Contribution to journal › Article › peer-review

17 Citations (Scopus)

Abstract

This work presents a systematic analysis on the impact of source-drain engineering using gate

Original language	English
Pages (from-to)	320-327
Number of pages	8
Journal	SOLID-STATE ELECTRONICS
Volume	51
Issue number	2
DOIs	https://doi.org/10.1016/j.sse.2007.01.006
Publication status	Published - Feb 2007

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials
Condensed Matter Physics

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10.1016/j.sse.2007.01.006

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title = "Scaling issues for analogue circuits using Double Gate SOI transistors",

abstract = "This work presents a systematic analysis on the impact of source-drain engineering using gate",

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AU - Armstrong, Alastair

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Scaling issues for analogue circuits using Double Gate SOI transistors

Abstract

ASJC Scopus subject areas

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