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The upcoming IEEE 802.11ac standard boosts the throughput of previous IEEE 802.11n by adding wider 80 MHz and 160 MHz channels with up to 8 antennas (versus 40 MHz channel and 4 antennas in 802.11n). This necessitates new 1-8 stream 256/512-point Fast Fourier Transform (FFT) / inverse FFT (IFFT) processing with 80/160 MSample/s throughput. Although there are abundant related work, they all fail to meet the requirements of IEEE 802.11ac FFT/IFFT on point size, throughput and multiple data streams at the same time. This paper proposes the first software defined FFT/IFFT architecture as a solution. By making use of a customised soft stream processor on FPGA, we show how a software defined FFT architecture can meet all the requirements of IEEE 802.11ac with low cost and high resource efficiency. When compared with dedicated Xilinx FFT core, our implementation exhibits only one third of the resources also up to three times of resource efficiency.
|Number of pages||4|
|Publication status||Published - Dec 2013|
|Event||Global Conference on Signal and Information Processing (GlobalSIP), 2013 IEEE - Austin, United States|
Duration: 03 Dec 2013 → 05 Dec 2013
|Conference||Global Conference on Signal and Information Processing (GlobalSIP), 2013 IEEE|
|Period||03/12/2013 → 05/12/2013|
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