TY - GEN
T1 - Static power consumption modeling and measurement of reconfigurable intelligent surfaces
AU - Wang, Jinghe
AU - Tang, Wankai
AU - Jin, Shi
AU - Li, Xiao
AU - Matthaiou, Michalis
PY - 2023/11/1
Y1 - 2023/11/1
N2 - Reconfigurable intelligent surfaces (RISs) are anticipated to transform wireless communication in a way that is both economical and energy efficient. Revealing the practical power consumption characteristics of RISs can provide an essential toolkit for the optimal design of RIS-assisted wireless communication systems and energy efficiency performance evaluation. Based on our previous work that modeled the dynamic power consumption of RISs, we henceforth concentrate more on static power consumption. We first divide the RIS hardware into three basic parts: the FPGA control board, the drive circuits, and the RIS unit cells. The first two parts are mainly to be investigated and the last part has been modeled as the dynamic power consumption in the previous work. In this work, the power consumption of the FPGA control board is regarded as a constant value, however, that of the drive circuit is a variant that is affected by the number of control signals and its self-power consumption characteristics. Therefore, we model the power consumption of the drive circuits of various kinds of RISs, i.e., PIN diode-Naractor diode-IRF switch-based RIS. Finally, the measurement results and typical value of static power consumption are illustrated and discussed.
AB - Reconfigurable intelligent surfaces (RISs) are anticipated to transform wireless communication in a way that is both economical and energy efficient. Revealing the practical power consumption characteristics of RISs can provide an essential toolkit for the optimal design of RIS-assisted wireless communication systems and energy efficiency performance evaluation. Based on our previous work that modeled the dynamic power consumption of RISs, we henceforth concentrate more on static power consumption. We first divide the RIS hardware into three basic parts: the FPGA control board, the drive circuits, and the RIS unit cells. The first two parts are mainly to be investigated and the last part has been modeled as the dynamic power consumption in the previous work. In this work, the power consumption of the FPGA control board is regarded as a constant value, however, that of the drive circuit is a variant that is affected by the number of control signals and its self-power consumption characteristics. Therefore, we model the power consumption of the drive circuits of various kinds of RISs, i.e., PIN diode-Naractor diode-IRF switch-based RIS. Finally, the measurement results and typical value of static power consumption are illustrated and discussed.
M3 - Conference contribution
SN - 9798350328110
T3 - European Signal Processing Conference (EUSIPCO)
BT - Proceedings of the 31st European Signal Processing Conference, EUSIPCO 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 31st European Signal Processing Conference 2023
Y2 - 4 September 2023 through 8 September 2023
ER -