System level DSP synthesis using voltage overscaling, unequal error protection & adaptive quality tuning

G. Karakonstantis, D. Mohapatra, K. Roy

Research output: Chapter in Book/Report/Conference proceedingChapter

29 Citations (Scopus)

Abstract

In this paper, we propose a system level design approach considering voltage over-scaling (VOS) that achieves error resiliency using unequal error protection of different computation elements, while incurring minor quality degradation. Depending on user specifications and severity of process variations/channel noise, the degree of VOS in each block of the system is adaptively tuned to ensure minimum system power while providing "just-the-right" amount of quality and robustness. This is achieved, by taking into consideration system level interactions and ensuring that under any change of operating conditions only the "lesscrucial" computations, that contribute less to block/system output quality, are affected. The design methodology applied to a DCT/IDCT system shows large power benefits (up to 69%) at reasonable image quality while tolerating errors induced by varying operating conditions (VOS, process variations, channel noise). Interestingly, the proposed IDCT scheme conceals channel noise at scaled voltages.
Original languageEnglish
Title of host publicationIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Pages133-138
Number of pages6
DOIs
Publication statusPublished - 01 Jan 2009

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