Systematic methodology for the design of high performance recursive digital filters

Stephen E. McQuillan, John V. McCanny

Research output: Contribution to journalArticlepeer-review

14 Citations (Scopus)


A systematic design methodology is described for the rapid derivation of VLSI architectures for implementing high performance recursive digital filters, particularly ones based on most significant digit (msd) first arithmetic. The method has been derived by undertaking theoretical investigations of msd first multiply-accumulate algorithms and by deriving important relationships governing the dependencies between circuit latency, levels of pipe-lining and the range and number representations of filter operands. The techniques described are general and can be applied to both bit parallel and bit serial circuits, including those based on on-line arithmetic. The method is illustrated by applying it to the design of a number of highly pipelined bit parallel IIR and wave digital filter circuits. It is shown that established architectures, which were previously designed using heuristic techniques, can be derived directly from the equations described.
Original languageEnglish
Pages (from-to)971-982
Number of pages12
JournalIEEE Transactions on Computers
Issue number8
Publication statusPublished - 01 Aug 1995

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Copyright 2004 Elsevier B.V., All rights reserved.


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