Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE

Ciara Moore, Neil Hanley, John McAllister, Maire O'Neill, Elizabeth O'Sullivan, Xiaolin Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)

Abstract

Homomorphic encryption offers potential for secure cloud computing. However due to the complexity of homomorphic encryption schemes, performance of implemented schemes to date have been unpractical. This work investigates the use of hardware, specifically Field Programmable Gate Array (FPGA) technology, for implementing the building blocks involved in somewhat and fully homomorphic encryption schemes in order to assess the practicality of such schemes. We concentrate on the selection of a suitable multiplication algorithm and hardware architecture for large integer multiplication, one of the main bottlenecks in many homomorphic encryption schemes. We focus on the encryption step of an integer-based fully homomorphic encryption (FHE) scheme. We target the DSP48E1 slices available on Xilinx Virtex 7 FPGAs to ascertain whether the large integer multiplier within the encryption step of a FHE scheme could fit on a single FPGA device. We find that, for toy size parameters for the FHE encryption step, the large integer multiplier fits comfortably within the DSP48E1 slices, greatly improving the practicality of the encryption step compared to a software implementation. As multiplication is an important operation in other FHE schemes, a hardware implementation using this multiplier could also be used to improve performance of these schemes.
LanguageEnglish
Title of host publicationFinancial Cryptography and Data Security
Subtitle of host publicationFC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers
PublisherSpringer
Pages226-237
Number of pages12
ISBN (Print)978-3-642-41319-3
DOIs
Publication statusPublished - Apr 2013
EventWorkshop on Applied Homomorphic Cryptography - Okinawa, Japan
Duration: 01 Apr 201305 Apr 2013

Publication series

NameLecture Notes in Computer Science
PublisherSpringer
Volume7862
ISSN (Print)0302-9743

Conference

ConferenceWorkshop on Applied Homomorphic Cryptography
CountryJapan
CityOkinawa
Period01/04/201305/04/2013

Fingerprint

Cryptography
Field programmable gate arrays (FPGA)
Hardware
Cloud computing
Computer hardware

Cite this

Moore, C., Hanley, N., McAllister, J., O'Neill, M., O'Sullivan, E., & Cao, X. (2013). Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. In Financial Cryptography and Data Security: FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers (pp. 226-237). (Lecture Notes in Computer Science; Vol. 7862). Springer. https://doi.org/10.1007/978-3-642-41320-9_16
Moore, Ciara ; Hanley, Neil ; McAllister, John ; O'Neill, Maire ; O'Sullivan, Elizabeth ; Cao, Xiaolin. / Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. Financial Cryptography and Data Security: FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers. Springer, 2013. pp. 226-237 (Lecture Notes in Computer Science).
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title = "Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE",
abstract = "Homomorphic encryption offers potential for secure cloud computing. However due to the complexity of homomorphic encryption schemes, performance of implemented schemes to date have been unpractical. This work investigates the use of hardware, specifically Field Programmable Gate Array (FPGA) technology, for implementing the building blocks involved in somewhat and fully homomorphic encryption schemes in order to assess the practicality of such schemes. We concentrate on the selection of a suitable multiplication algorithm and hardware architecture for large integer multiplication, one of the main bottlenecks in many homomorphic encryption schemes. We focus on the encryption step of an integer-based fully homomorphic encryption (FHE) scheme. We target the DSP48E1 slices available on Xilinx Virtex 7 FPGAs to ascertain whether the large integer multiplier within the encryption step of a FHE scheme could fit on a single FPGA device. We find that, for toy size parameters for the FHE encryption step, the large integer multiplier fits comfortably within the DSP48E1 slices, greatly improving the practicality of the encryption step compared to a software implementation. As multiplication is an important operation in other FHE schemes, a hardware implementation using this multiplier could also be used to improve performance of these schemes.",
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Moore, C, Hanley, N, McAllister, J, O'Neill, M, O'Sullivan, E & Cao, X 2013, Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. in Financial Cryptography and Data Security: FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers. Lecture Notes in Computer Science, vol. 7862, Springer, pp. 226-237, Workshop on Applied Homomorphic Cryptography, Okinawa, Japan, 01/04/2013. https://doi.org/10.1007/978-3-642-41320-9_16

Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. / Moore, Ciara; Hanley, Neil; McAllister, John; O'Neill, Maire; O'Sullivan, Elizabeth; Cao, Xiaolin.

Financial Cryptography and Data Security: FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers. Springer, 2013. p. 226-237 (Lecture Notes in Computer Science; Vol. 7862).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - Homomorphic encryption offers potential for secure cloud computing. However due to the complexity of homomorphic encryption schemes, performance of implemented schemes to date have been unpractical. This work investigates the use of hardware, specifically Field Programmable Gate Array (FPGA) technology, for implementing the building blocks involved in somewhat and fully homomorphic encryption schemes in order to assess the practicality of such schemes. We concentrate on the selection of a suitable multiplication algorithm and hardware architecture for large integer multiplication, one of the main bottlenecks in many homomorphic encryption schemes. We focus on the encryption step of an integer-based fully homomorphic encryption (FHE) scheme. We target the DSP48E1 slices available on Xilinx Virtex 7 FPGAs to ascertain whether the large integer multiplier within the encryption step of a FHE scheme could fit on a single FPGA device. We find that, for toy size parameters for the FHE encryption step, the large integer multiplier fits comfortably within the DSP48E1 slices, greatly improving the practicality of the encryption step compared to a software implementation. As multiplication is an important operation in other FHE schemes, a hardware implementation using this multiplier could also be used to improve performance of these schemes.

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Moore C, Hanley N, McAllister J, O'Neill M, O'Sullivan E, Cao X. Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. In Financial Cryptography and Data Security: FC 2013 Workshops, USEC and WAHC 2013, Okinawa, Japan, April 1, 2013, Revised Selected Papers. Springer. 2013. p. 226-237. (Lecture Notes in Computer Science). https://doi.org/10.1007/978-3-642-41320-9_16