The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes

Jiandong Mu; Aida Vosoughi; Joao Andrade; Alexios Balatsoukas-Stimming; Georgios Karakonstantis; Andreas Burg; Gabriel Falcao; Vitor Silva; Joseph R. Cavallaro

doi:10.1109/ACSSC.2015.7421423

The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes

Jiandong Mu, Aida Vosoughi, Joao Andrade, Alexios Balatsoukas-Stimming, Georgios Karakonstantis, Andreas Burg, Gabriel Falcao, Vitor Silva, Joseph R. Cavallaro

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

141 Downloads (Pure)

Abstract

In this paper, we investigate the decoding performance of spatially-coupled LDPC codes in the case of faulty memory bit-cells within the storage modules of the decoder. Our study characterizes error resilience, by measuring the BER degradation from such errors and we focus on the application of error mitigation techniques that further aid the inherent error resilience. In particular, we propose mitigation strategies based on the use of methods that consider the algorithmic significance of each bit-cell fault, such as MSB protection and self-correction of messages.

Original language	English
Title of host publication	2015 49th Asilomar Conference on Signals, Systems and Computers
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1627-1631
Number of pages	5
ISBN (Electronic)	978-1-4673-8576-3
DOIs	https://doi.org/10.1109/ACSSC.2015.7421423
Publication status	Published - 26 Feb 2016
Externally published	Yes
Event	49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 - Pacific Grove, United States Duration: 08 Nov 2015 → 11 Nov 2015

Conference

Conference	49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015
Country/Territory	United States
City	Pacific Grove
Period	08/11/2015 → 11/11/2015

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10.1109/ACSSC.2015.7421423Licence: Unspecified

The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes
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Cite this

Mu, J., Vosoughi, A., Andrade, J., Balatsoukas-Stimming, A., Karakonstantis, G., Burg, A., Falcao, G., Silva, V., & Cavallaro, J. R. (2016). The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes. In 2015 49th Asilomar Conference on Signals, Systems and Computers (pp. 1627-1631). [7421423] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ACSSC.2015.7421423

@inproceedings{b3e1f568037d4124bf6ac6cf2027d090,

title = "The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes",

abstract = "In this paper, we investigate the decoding performance of spatially-coupled LDPC codes in the case of faulty memory bit-cells within the storage modules of the decoder. Our study characterizes error resilience, by measuring the BER degradation from such errors and we focus on the application of error mitigation techniques that further aid the inherent error resilience. In particular, we propose mitigation strategies based on the use of methods that consider the algorithmic significance of each bit-cell fault, such as MSB protection and self-correction of messages.",

author = "Jiandong Mu and Aida Vosoughi and Joao Andrade and Alexios Balatsoukas-Stimming and Georgios Karakonstantis and Andreas Burg and Gabriel Falcao and Vitor Silva and Cavallaro, {Joseph R.}",

year = "2016",

month = feb,

day = "26",

doi = "10.1109/ACSSC.2015.7421423",

language = "English",

pages = "1627--1631",

booktitle = "2015 49th Asilomar Conference on Signals, Systems and Computers",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 ; Conference date: 08-11-2015 Through 11-11-2015",

}

Mu, J, Vosoughi, A, Andrade, J, Balatsoukas-Stimming, A, Karakonstantis, G, Burg, A, Falcao, G, Silva, V & Cavallaro, JR 2016, The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes. in 2015 49th Asilomar Conference on Signals, Systems and Computers., 7421423, Institute of Electrical and Electronics Engineers Inc., pp. 1627-1631, 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015, Pacific Grove, United States, 08/11/2015. https://doi.org/10.1109/ACSSC.2015.7421423

The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes. / Mu, Jiandong; Vosoughi, Aida; Andrade, Joao et al.

2015 49th Asilomar Conference on Signals, Systems and Computers. Institute of Electrical and Electronics Engineers Inc., 2016. p. 1627-1631 7421423.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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T1 - The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes

AU - Mu, Jiandong

AU - Vosoughi, Aida

AU - Andrade, Joao

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AU - Karakonstantis, Georgios

AU - Burg, Andreas

AU - Falcao, Gabriel

AU - Silva, Vitor

AU - Cavallaro, Joseph R.

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AB - In this paper, we investigate the decoding performance of spatially-coupled LDPC codes in the case of faulty memory bit-cells within the storage modules of the decoder. Our study characterizes error resilience, by measuring the BER degradation from such errors and we focus on the application of error mitigation techniques that further aid the inherent error resilience. In particular, we propose mitigation strategies based on the use of methods that consider the algorithmic significance of each bit-cell fault, such as MSB protection and self-correction of messages.

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DO - 10.1109/ACSSC.2015.7421423

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BT - 2015 49th Asilomar Conference on Signals, Systems and Computers

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ER -

The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes

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