The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes

Jiandong Mu, Aida Vosoughi, Joao Andrade, Alexios Balatsoukas-Stimming, Georgios Karakonstantis, Andreas Burg, Gabriel Falcao, Vitor Silva, Joseph R. Cavallaro

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)
116 Downloads (Pure)

Abstract

In this paper, we investigate the decoding performance of spatially-coupled LDPC codes in the case of faulty memory bit-cells within the storage modules of the decoder. Our study characterizes error resilience, by measuring the BER degradation from such errors and we focus on the application of error mitigation techniques that further aid the inherent error resilience. In particular, we propose mitigation strategies based on the use of methods that consider the algorithmic significance of each bit-cell fault, such as MSB protection and self-correction of messages.
Original languageEnglish
Title of host publication2015 49th Asilomar Conference on Signals, Systems and Computers
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages1627-1631
Number of pages5
ISBN (Electronic)978-1-4673-8576-3
DOIs
Publication statusPublished - 26 Feb 2016
Externally publishedYes
Event49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 - Pacific Grove, United States
Duration: 08 Nov 201511 Nov 2015

Conference

Conference49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015
CountryUnited States
CityPacific Grove
Period08/11/201511/11/2015

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    Mu, J., Vosoughi, A., Andrade, J., Balatsoukas-Stimming, A., Karakonstantis, G., Burg, A., Falcao, G., Silva, V., & Cavallaro, J. R. (2016). The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes. In 2015 49th Asilomar Conference on Signals, Systems and Computers (pp. 1627-1631). [7421423] Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ACSSC.2015.7421423