The impact of the intrinsic and extrinsic resistances of double gate SOI on RF performance

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Abstract

In this paper, the analogue performance of a 65 nm node double gate Sol (DGSOI) is qualitatively investigated using MixedMode simulation. The intrinsic resistance of the device is optimised by evaluating the impact of the source/drain engineering using variation of spacers and doping profile on the RF key figures of merit such as f(T), and f(MAX). It is evident that longer spacers, which approach the length of the gate offer better RF performance irrespective of the profile as long as the doping gradient at the gate edge is <7 nm/decade. Analytical expressions, which reflect the dependence of f(T), and fMAX on extrinsic source, drain and gate resistances R-S, R-D and R-G have been derived. While R-D and R-S have equal effect on f(T), R-D appears to be more influential than R-S in reducing f(MAX). The sensitivity of f(MAX) to R-S and R-D. has been shown to be greater than to R-G. (c) 2006 Elsevier Ltd. All rights reserved.
Original languageEnglish
Pages (from-to)774-783
Number of pages10
JournalSOLID-STATE ELECTRONICS
Volume50
Issue number5
DOIs
Publication statusPublished - May 2006

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

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