VLSI architectures for vector quantization

M. Yan, J.V. McCanny, Y. Hu

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

The real time implementation of an efficient signal compression technique, Vector Quantization (VQ), is of great importance to many digital signal coding applications. In this paper, we describe a new family of bit level systolic VLSI architectures which offer an attractive solution to this problem. These architectures are based on a bit serial, word parallel approach and high performance and efficiency can be achieved for VQ applications of a wide range of bandwidths. Compared with their bit parallel counterparts, these bit serial circuits provide better alternatives for VQ implementations in terms of performance and cost.
Original languageEnglish
Pages (from-to)5-23
Number of pages19
JournalJournal of VLSI signal processing systems for signal, image and video technology
Volume10
Issue number1
DOIs
Publication statusPublished - 01 Jun 1995

Bibliographical note

Copyright 2007 Elsevier B.V., All rights reserved.

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