Activities per year
Abstract
The integration of connected and autonomous technologies in safety-critical brought significant system design challenges. These systems are constantly evolving and becoming more complex. With their connection to the cloud and the internet, these safety-critical systems are now exposed to greater risks of cyber-attacks, which poses new challenges to their safety, reliability and resilience. To approach these complex system design challenges, this paper proposes XANDAR's Verification & Validation strategy using Static Analysis, Timing Analysis, Model-in-loop and Network simulation tool. To ensure functional correctness, the proposed XANDAR Verification and Validation approach utilizes early integration of simulation and static analysis techniques during the development cycle. This proposed approach differs from existing methods by emphasizing early integration, rather than applying it to later stages of development cycle to begin verification. In addition, the proposed approach utilizes timing analysis to ensure non-functional timing aspects meet the timing requirements. The approach applies tools such as Polyspace Bug Finder and Code Prover for static analysis, Timing Architect for timing analysis, NS3 simulator for network architecture simulation. The proposed approach aims to ensure system safety and security through a rigorous and comprehensive verification process. These verification approaches will be validated by applying it to automotive and avionics use cases.
Original language | English |
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Title of host publication | Proceedings of the 36th IEEE International System-on-Chip Conference, SOCC 2023 |
Editors | Jurgen Becker, Andrew Marshall, Tanja Harbaum, Amlan Ganguly, Fahad Siddiqui, Kieran McLaughlin |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Number of pages | 6 |
ISBN (Electronic) | 9798350300116 |
ISBN (Print) | 9798350300123 |
DOIs | |
Publication status | Published - 22 Sept 2023 |
Event | 36th IEEE International System-on-Chip Conference, SOCC 2023 - Santa Clara, United States Duration: 05 Sept 2023 → 08 Sept 2023 |
Publication series
Name | IEEE International System-on-Chip Conference (SOCC) |
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Volume | 2023-September |
ISSN (Print) | 2164-1676 |
ISSN (Electronic) | 2164-1706 |
Conference
Conference | 36th IEEE International System-on-Chip Conference, SOCC 2023 |
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Country/Territory | United States |
City | Santa Clara |
Period | 05/09/2023 → 08/09/2023 |
Bibliographical note
Funding Information:This research work was funded by the European Union’s Horizon 2020 Research and Innovation Programme under Grant 957210 (XANDAR).
Publisher Copyright:
© 2023 IEEE.
Keywords
- Model-in-Loop Simulation
- Static Analysis
- Timing Analysis and Network Simulation
- Validation
- Verification
ASJC Scopus subject areas
- Hardware and Architecture
- Control and Systems Engineering
- Electrical and Electronic Engineering
Fingerprint
Dive into the research topics of 'XANDAR: verification & validation approach for safety-critical systems'. Together they form a unique fingerprint.Activities
- 2 Oral presentation
-
A comparative analysis of security patterns for enhanced security in safety-critical systems
Siddiqui, F. (Advisor)
07 Sept 2023Activity: Talk or presentation types › Oral presentation
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Cybersecurity engineering: bridging the security gaps in advanced automotive systems and ISO/SAE 21434
Siddiqui, F. (Advisor)
22 Jun 2023Activity: Talk or presentation types › Oral presentation
Research output
- 2 Citations
- 7 Conference contribution
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A comparative analysis of security patterns for enhanced security in safety-critical systems
Yengec-Tasdemir, S. B., Siddiqui, F., Sezer, S., Hui, H., McLaughlin, K. & Sonigara, B., 22 Sept 2023, Proceedings of the IEEE 36th International System-on-Chip Conference, SOCC 2023. Becker, J., Marshall, A., Harbaum, T., Ganguly, A., Siddiqui, F. & McLaughlin, K. (eds.). Institute of Electrical and Electronics Engineers Inc., 6 p. (IEEE International SOC Conference: Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open AccessFile1 Citation (Scopus)104 Downloads (Pure) -
A runtime security monitoring architecture for embedded hypervisors
Hui, H., McLaughlin, K., Siddiqui, F., Sezer, S., Yengec Tasdemir, S. & Sonigara, B., 22 Sept 2023, Proceedings of the IEEE 36th International System-on-Chip Conference, SOCC 2023. Becker, J., Marshall, A., Harbaum, T., Ganguly, A., Siddiqui, F. & McLaughlin, K. (eds.). Institute of Electrical and Electronics Engineers Inc., 6 p. (IEEE International SOC Conference: Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open AccessFile1 Citation (Scopus)130 Downloads (Pure) -
Cybersecurity engineering: bridging the security gaps in advanced automotive systems and ISO/SAE 21434
Siddiqui, F., Khan, R., Yengec Tasdemir, S., Hui, H., Sonigara, B., Sezer, S. & McLaughlin, K., 14 Aug 2023, 97th IEEE Vehicular Technology Conference (VTC2023-Spring). Institute of Electrical and Electronics Engineers Inc., ( IEEE Vehicular Technology Conference (VTC): Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open AccessFile5 Citations (Scopus)222 Downloads (Pure)